EV2(ID:6355/ev:001)

Euclid Version 2
Related languages
Euclid => EV2   Evolution of
References:
  • Elwood, W.L. "A USER'S GUIDE AND LANGUAGE REFERENCE MANUAL FOR THE EV2 TO CDFG LANGUAGE TRANSLATOR OF THE ELF HARDWARE SYNTHESIS SYSTEM" CORPORATE AUTHOR: Audesyn Inc, Edmonton ALTA (CAN) Technical Report AUTR-88-04; 15 Aug 1988 view details Abstract: The document is both a user's guide and a language reference manual for the EV2 to CDFG language translator, which is used by the Elf Hardware Synthesis System.
  • Elwood, W.L. "ELF HARDWARE SYNTHESIS SYSTEM EV2 TO CDFG LANGUAGE TRANSLATOR. USER'S GUIDE AND LANGUAGE REFERENCE MANUAL" Audesyn Inc, Edmonton ALTA (CAN)AUTR-89-03; Technical Report; Contractor Report; Replaces AUTR-88-04 15 Mar 1989 view details Abstract: The document defines the subset and extensions to the Euclid Version 2(Cor84a) programming language recognized by the Elf hardware synthesis system. A user's guide and installation instructions are also included. The document is intended to augment (Cor84a), and hence uses the same language description style as found there. Extensions have been added to the EV2 language to make it more suitable for hardware synthesis. These extensions include subtypes, timing constraints, precedence and i/o pin declarations.
  • Elwood, W.L. "ELF HARDWARE SYNTHESIS SYSTEM HARDWARE ALLOCATION USER'S GUIDE" Audesyn Inc, Edmonton ALTA (CAN) 1989 view details Abstract: The user's guide for the Elf hardware synthesis system. The various steps in the allocation of an EV2 program to a circuit are explained in this document. The user is expected to know how to write an EV2 program before using the allocator. The Elf hardware synthesis system is used to create a circuit from an Euclid version 2 program. Once a valid EV2 file has been written, the allocation of this program, from the Control/Data Flow Graph (CDFG), is possible. Elf will convert the CDFG into an intermediate form of the final circuit known as a circuit graph (CG). The CG is then converted into one of several circuit design formats, suitable for fabrication, simulation, etc.